ISL12024IVZ【PDF 10/25 页】IC RTC/CALENDAR EEPROM 8-TSSOP

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FN6370.3

August 18, 2008

Acknowledge Polling

Disabling of the inputs during non-volatile write cycles can

be used to take advantage of the 12ms (typ) write cycle time.

Once the stop condition is issued to indicate the end of the

master’s byte load operation, the ISL12024 initiates the

internal non-volatile write cycle. Acknowledge polling can

begin immediately. To do this, the master issues a start

condition followed by the Memory Array Slave Address Byte

for a write or read operation (AEh or AFh). If the ISL12024 is

still busy with the non-volatile write cycle, then no ACK will

be returned. When the ISL12024 has completed the write

operation, an ACK is returned and the host can proceed with

the read or write operation. See the flow chart in

Figure 20. Note: Do not use the CCR Slave byte (DEh or

DFh) for Acknowledge Polling.

Read Operations

There are three basic read operations: Current Address

Read, Random Read and Sequential Read.

Current Address Read

Internally the ISL12024 contains an address counter that

maintains the address of the last word read incremented by

one. Therefore, if the last read was to address n, the next

read operation would access data from address n+1. On

power-up, the 16-bit address is initialized to 00h. In this way,

a current address read immediately after the power-on reset

can download the entire contents of memory starting at the

first location. Upon receipt of the Slave Address Byte with

the R/W bit set to one, the ISL12024 issues an

acknowledge, then transmits 8 data bits. The master

terminates the read operation by not responding with an

acknowledge during the ninth clock and issuing a stop

condition. See Figure 19 for the address, acknowledge, and

data transfer sequence.

WORD

ADDRESS 0

SLAVE

ADDRESS

WORD

ADDRESS 1

DATA

(n)

SDA BUS

SIGNALS FROM

THE SLAVE

SIGNALS FROM

THE MASTER

DATA

(1)

≤ n ≤ 16 for EEPROM ARRAY

≤ n ≤ 8 for CCR

0 0 00 00 0

FIGURE 18. PAGE WRITE SEQUENCE

SLAVE

ADDRESS

DATA

SDA BUS

SIGNALS FROM

THE SLAVE

SIGNALS FROM

THE MASTER

FIGURE 19. CURRENT ADDRESS READ SEQUENCE

ACK

RETURNED?

ISSUE MEMORY ARRAY SLAVE

ADDRESS BYTE

AFH (READ) OR AEH (WRITE)

BYTE LOAD

COMPLETED BY

ISSUING STOP.

ENTER ACK POLLING

ISSUE STOP

ISSUE START

YES

ISSUE STOP

CONTINUE

NORMAL READ OR

WRITE COMMAND

SEQUENCE

PROCEED

YES

NON-VOLATILE WRITE

CYCLE COMPLETE. CONTINUE

COMMAND SEQUENCE?

FIGURE 20. ACKNOWLEDGE POLLING SEQUENCE

ISL12024

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